1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a surrounding structure.
2. Description of the Related Art
Referring to FIG. 1, a conventional semiconductor device has a substrate 11 that is made of a semiconductor material, a plurality of transistors 12, and a conductive structure 13.
The substrate 11 includes a first epitaxial layer 111 that has a first electrical type, and a second epitaxial layer 112 that is formed on the first epitaxial layer 111 and that has a majority carrier concentration less than that of the first epitaxial layer 111. The first epitaxial layer 111 is formed as a conductor due to a higher majority carrier concentration thereof.
Each of the transistors 12 includes a well region 123 that is formed in the second epitaxial layer 112 and that has a second electrical type opposite to the first electrical type, a source region 121 that has the first electrical type and that is formed in the well region 123, and a gate structure 122 that is formed on the second epitaxial layer 112. The gate structure 122 includes a dielectric layer 124 that is formed on the second epitaxial layer 112, and a conductive layer 125 that is formed on the dielectric layer 124 and that is spaced apart from the second epitaxial layer 112 and the source region 121.
The conductive structure 13 is made of a metal material so as to exhibit a conductive property, and includes a plurality of conductive structure regions 131 that are known as contacts in the art and that cover and contact the source regions 121. In general, because the transistors 12 are arranged to be spaced apart from one another, and the first epitaxial layer 111 of the substrate 11 is a continuous layer, the plurality of conductive structure regions 131 of the conductive structure 13 are substantially connected to one another.
The first epitaxial layer 111 of the substrate 11 serves as a drain, the well region 123 serves as a well, the source region 121 serves as a source, and the gate structure 122 serves as a gate. In addition, the transistors 12 are connected in parallel to one another through the first epitaxial layer 111 of the substrate 11 and the conductive structure regions 131.
When a predetermined voltage is applied to the first epitaxial layer 111 of the substrate 11 and the conductive layer 125 of the gate structure 122, and the conductive structure 13 is grounded (i.e., the source region 121 is 0 volt), the voltage from the first epitaxial layer 111 allows the well region 123 to form a channel so that current from the substrate 11 passes through the channel to the source region 121, thereby actuating the power transistor. All of the transistors 12 of the semiconductor device are connected in parallel so that the currents of the transistors 12 are collected.
A disadvantage of the conventional semiconductor device is that, if the predetermined voltage applied at the drain is too large, the dielectric layer 124 of the gate structure 122 of the transistors 12 may not be able to withstand the high voltage and break down. In addition, because the transistors 12 are parallelly connected, the breakdown of one of the transistors 12 may make all of the transistors 12 unable to operate normally, thereby leading to permanent failure of the semiconductor device.